[Meego-kernel] [PATCH 02/22] GFX: Remove the 6ms delay following TopazSC MTX register reset.

hitesh.k.patel at intel.com hitesh.k.patel at intel.com
Thu Dec 16 10:51:38 PST 2010


From: Elaine Wang <elaine.wang at intel.com>

This delay was approved to be unnecessary and safe to be removed.

Signed-off-by: Elaine Wang <elaine.wang at intel.com>
Signed-off-by: Hitesh K. Patel <hitesh.k.patel at intel.com>
---
 drivers/staging/mrst/imgv/pnw_topazinit.c |    4 ----
 1 files changed, 0 insertions(+), 4 deletions(-)

diff --git a/drivers/staging/mrst/imgv/pnw_topazinit.c b/drivers/staging/mrst/imgv/pnw_topazinit.c
index 3314e14..3ce367c 100644
--- a/drivers/staging/mrst/imgv/pnw_topazinit.c
+++ b/drivers/staging/mrst/imgv/pnw_topazinit.c
@@ -1231,8 +1231,6 @@ int topaz_upload_fw(struct drm_device *dev, enum drm_pnw_topaz_codec codec, uint
 		MTX_CORE_CR_MTX_SOFT_RESET_MTX_RESET_MASK,
 		core_id);
 
-	DRM_UDELAY(6000);
-
 	/* # upload the master and slave firmware by DMA */
 	if(core_id == 0)
 	    cur_codec_fw = &topaz_priv->topaz_fw[codec*2];
@@ -1446,8 +1444,6 @@ int topaz_upload_fw(struct drm_device *dev, enum drm_pnw_topaz_codec codec, uint
 		    MTX_CORE_CR_MTX_SOFT_RESET_MTX_RESET_MASK,
 		    core_id);
 
-	DRM_UDELAY(6000);
-
 	/* # upload the master and slave firmware by DMA */
 	if(core_id == 0)
 	    cur_codec_fw = &topaz_priv->topaz_fw[codec*2];
-- 
1.7.1



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