[Meego-kernel] [PATCH 09/26] GFX: Ovelay needs to Sync at vblank

hitesh.k.patel at intel.com hitesh.k.patel at intel.com
Wed Nov 24 19:59:23 PST 2010


From: Jason Hu <jason.hu at intel.com>

Video Overlay: Query overlay status register to make
sure overlay OVADD register write to sync with the next vblank

Signed-off-by: Jason Hu <jason.hu at intel.com>
Signed-off-by: Hitesh K. Patel <hitesh.k.patel at intel.com>
---
 drivers/staging/mrst/drv/psb_drm.h       |    1 +
 drivers/staging/mrst/drv/psb_drv.c       |   13 +++++++++++--
 drivers/staging/mrst/drv/psb_intel_reg.h |    2 ++
 3 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/drivers/staging/mrst/drv/psb_drm.h b/drivers/staging/mrst/drv/psb_drm.h
index a24e272..9f4a67b 100644
--- a/drivers/staging/mrst/drv/psb_drm.h
+++ b/drivers/staging/mrst/drv/psb_drm.h
@@ -594,6 +594,7 @@ struct drm_psb_register_rw_arg {
         	uint32_t IEP_ENABLED;
         	uint32_t IEP_BLE_MINMAX;
         	uint32_t IEP_BSSCC_CONTROL;
+                uint32_t b_wait_vblank;
 	} overlay;
 
 	uint32_t sprite_enable_mask;
diff --git a/drivers/staging/mrst/drv/psb_drv.c b/drivers/staging/mrst/drv/psb_drv.c
index 545cc39..87af1d7 100644
--- a/drivers/staging/mrst/drv/psb_drv.c
+++ b/drivers/staging/mrst/drv/psb_drv.c
@@ -2311,6 +2311,11 @@ static int psb_register_rw_ioctl(struct drm_device *dev, void *data,
 			{
 				PSB_WVDC32(arg->overlay.OVADD, OV_OVADD);
 
+                                if (arg->overlay.b_wait_vblank) {
+                                    while (!(PSB_RVDC32(OV_DOVASTA) & (0x1 << 31)))
+                                        cpu_relax();
+                                }
+
 				if (IS_MDFLD(dev)) {
 					if ((((arg->overlay.OVADD & OV_PIPE_SELECT) >> OV_PIPE_SELECT_POS) == OV_PIPE_A) 
 						&& (!(dev_priv->dsr_fb_update & MDFLD_DSR_OVERLAY_0))) {
@@ -2347,9 +2352,13 @@ static int psb_register_rw_ioctl(struct drm_device *dev, void *data,
 					}
 				}
 			}
-			if (arg->overlay_write_mask & OVC_REGRWBITS_OVADD)
+			if (arg->overlay_write_mask & OVC_REGRWBITS_OVADD) {
 				PSB_WVDC32(arg->overlay.OVADD, OVC_OVADD);
-
+                                if (arg->overlay.b_wait_vblank) {
+                                    while (!(PSB_RVDC32(OV_DOVASTA) & (0x1 << 31)))
+                                        cpu_relax();
+                                }
+                        }
 			ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
 		} else {
 			if (arg->overlay_write_mask & OV_REGRWBITS_OGAM_ALL) {
diff --git a/drivers/staging/mrst/drv/psb_intel_reg.h b/drivers/staging/mrst/drv/psb_intel_reg.h
index c192b1b..c95da7d 100644
--- a/drivers/staging/mrst/drv/psb_intel_reg.h
+++ b/drivers/staging/mrst/drv/psb_intel_reg.h
@@ -566,6 +566,7 @@ struct dpst_guardband {
  */
 #define OV_C_OFFSET		0x08000
 #define OV_OVADD		0x30000
+#define OV_DOVASTA              0x30008
 # define OV_PIPE_SELECT				(BIT6|BIT7)
 # define OV_PIPE_SELECT_POS			6
 # define OV_PIPE_A				0
@@ -577,6 +578,7 @@ struct dpst_guardband {
 #define OV_OGAMC1		0x30020
 #define OV_OGAMC0		0x30024
 #define OVC_OVADD		0x38000
+#define OVC_DOVCSTA             0x38008
 #define OVC_OGAMC5		0x38010
 #define OVC_OGAMC4		0x38014
 #define OVC_OGAMC3		0x38018
-- 
1.7.1



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